High Performance Computing or Communications SoC

The block diagram of a high performance computing or communications System-On-Chip is shown below (with mixed signal blocks in blue). Either wireless, optical or wired receivers (RCV) and transmitters (XMT) carry data to and from onchip logic, often controlled by an embedded processor. The RCV and XMT blocks frequently push the start of the art in sample rate, resolution, and power efficiency. A set of M low-noise amplifiers (LNAs) is used to amplify low-level analog signals from a sensor array for conversion by a smaller number of analog-to-digital converters (ADCs).  Support circuits minimize the need for external components, and include wired or wireless power management, voltage and current reference circuitry (Vref, Iref), and a phase-locked-loop (PLL) to generate clocks.